AArch64 MP+dmb.sy+data-wsi-[ws-rf]-addr
"DMB.SYdWW Rfe DpDatadW Wsi WsLeave RfBack DpAddrdR Fre"
(* Is first W to z by P1 obscured ? *)
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpDatadW Wsi WsLeave RfBack DpAddrdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X8=x;
2:X1=z;
}
P0 | P1 | P2 ;
MOV W0,#1 | LDR W0,[X1] | MOV W0,#3 ;
STR W0,[X1] | AND W2,W0,#128 | STR W0,[X1] ;
DMB SY | ADD W2,W2,#1 | ;
MOV W2,#1 | STR W2,[X3] | ;
STR W2,[X3] | MOV W4,#2 | ;
| STR W4,[X3] | ;
| LDR W5,[X3] | ;
| AND W6,W5,#128 | ;
| LDR W7,[X8,W6,SXTW] | ;
exists
(z=3 /\ 1:X0=1 /\ 1:X5=3 /\ 1:X7=0)